PLL(PHASE LOCKED LOOP)|| BASIC PLL TOPOLOGY || EC462 MIXED SIGNAL CIRCUIT DESIGN

So today we are discussing about phase locked loop. So what is a phase locked loop or a simple phase locked loop? A PLL is a feedback system that compares the output phase with the input phase. The comparison is performed by a phase comparator or phase detector. A PLL is a feedback system that compares the output phase with the input phase. The comparison is performed by a phase comparator or phase detector. So what is a phase detector? A phase detector is a circuit whose average output Vout bar is linearly proportional to the phase difference delta phi between its two inputs. The two inputs are V1 of t and V2 of t. If there is any difference in the phase between the two inputs, the phase detector produces the corresponding voltage for that difference. In the ideal case, the relationship between Vout and delta phi will be linear. In the ideal case, the value of zero crossing origin will be zero. The slope of the line Kpd is called the gain of the phase detector. An example of a phase detector is the XOR gate. In the XOR gate, V1, V2, V1 of t, V2 of t, Vout are given in the same way as the phase detector. The XOR gate produces the corresponding voltage for the phase difference between V1 of t and V2 of t. Now, let's see a basic PLL topology. Before going to the concept of phase locking, let's see how the VCO is aligned with the phase of the reference clock. In figure 2.3, you can see how a PLL works. In figure A, you can see two signals. One is VCLOCK and the other is VVCO. There is a small phase difference between these two waveforms. In figure A, you can see two signals. There is a phase difference between VCLOCK and VVCO. In figure 2.4, we are using a voltage controlled oscillator. The oscillator's frequency matches with the frequency of the given signal. This is called locking. In figure 2.5, you can see that the VCO frequency starts to adjust. The adjustment starts at the time interval t1. When the adjustment reaches t2, the VCO signal is in the same phase as VCK. This means that the two signals are in the same phase. The phase difference is the same. This is the process of PLL. Let's see the correct working of the PLL. The alignment can be accomplished by stepping the VCO frequency to a lower value for a certain time interval as well. Thus, phase alignment can be achieved only by a frequency change. The output phase of VCO can be aligned with the phase of the reference IF. The first point is that the frequency of VCO is changed momentarily. A means of comparing the two phases, i.e., a phase detector is used to determine whether the VCO and the reference signals are aligned. A phase detector is used to check whether the VCO and the reference signals are aligned. The task of aligning the output phase of VCO with the phase of reference is called phase locking. A PLL simply consists of a phase detector and a VCO in the feedback loop. A PLL consists of two components, namely a phase detector, a VCO, and a feedback loop. The phase detector compares the output and the input. It generates an error voltage. This error voltage varies the frequency of the VCO. The frequency of the VCO is determined by the phase detector and the feedback loop. We need to modify the topology of the phase detector, VCO, and feedback loop. The second figure shows the modification. The output of the phase detector, VPD, has two components. One is a DC component and the other is a high-frequency component. The DC component is the desirable component. The high-frequency component is undesirable. The control voltage of the oscillator should be maintained steadily. We need to filter the output of the phase detector using these two components. We interpose a low-pass filter between the phase detector and VCO. This is what you saw in the second figure. We interpose a low-pass filter between the two components. The purpose of this is to eliminate the undesirable high-frequency component. We add a low-pass filter between the phase detector and VCO. This is the basic PLL topology. The basic PLL topology consists of a phase detector, a low-pass filter, and a VCO. This is a feedback to compare the output and input. The gain of the low-pass filter is unity. We do not process or amplify the signal. We use the low-pass filter to pass only the DC component. The feedback loop is the same as the first figure. The phase difference between the output and input is minimum.