How do computers work¿ CPU, ROM, RAM, address bus, data bus, control bus, address decoding. .

The heart of absolutely any computing device, be it a personal computer, smartphone, or a programmable calculator, is the center processor, or CPU. The CPU's main job is to execute programs, or code. What this actually means is that as soon as power is applied, the processor, hungry for executable code, starts consuming data from external memory. Just like a person who reads a book word by word, the processor reads the program byte by byte. As long as power is applied to the circuit, the CPU cannot stop, and program execution continues forever. And just like a book is made up of a sequence of letters, words, and sentences, computer memory is organized as an array of integer numbers, called bytes, and each byte can take a value from 0 to 255. In order for the CPU to know which memory cell exactly it addresses, all cells are numbered, starting from 0. The ordinal number of a cell is called address. For example, memory cell number 300 has an address of 299. That's because cell numbers start from 0. Computer memory is very similar to a sheet of paper. You can write something in it that can be read later. There are basically two types of memory — read-only and random-access. Read-only memory, or ROM, usually contains pre-programmed code, which is intended for the CPU to execute, while random-access memory, or ROM, mostly contains temporary data either generated by the CPU itself or loaded by the CPU from external media during program execution. As the name suggests, read-only memory can only be read by the CPU, while random-access memory can be both read and written to. This means that ROM retains data even if you turn off your computer, while RAM is erased every time power is interrupted. Dimsticks installed in your PC or laptop is RAM, and BIOS chip is ROM. BIOS is a small program that is executed every time you boot up your system. Let's now take a glance at how it works. Imagine a very simple computing device consisting of a CPU and a ROM chip. The ROM chip contains a program called firmware. The name firmware suggests that it's a proprietary piece of software that can only run on a certain device. As the power is applied, the CPU immediately addresses the ROM chip in an effort to read program code that it could execute. Obviously, for that to happen, it needs to read data from a number of memory cells. So, each cell is read by specifying its address, which, like was mentioned above, is its unique ordinal number. For the CPU to be able to tell the ROM chip the address of the cell it wants to read, all computers have a communication system called address bus. By design, it's basically a set of regular electrical wires that use binary system, that's ones and zeros, to encode memory cell address. This method, in fact, is always used by computers to communicate numbers between devices. Imagine that the CPU wants to read cell whose address is 44206. This is just a random sample number, it doesn't mean anything. Let us now open Windows calculator and convert it to binary. The result is this binary number. Note that it has 16 bits, that's binary digits. So, exactly these ones and zeros the CPU will put up on the address bus to read cell number 44206. Yep, it's that simple. Please note, and that is very important, the least significant bit, LSB, of the address, which is zero in our case, will be put up at address line A0, while the most significant bit, MSB, will be at line A15. Address numbering, like everything in programming, also starts at zero. Because the address is always sent from the CPU to external devices, and never in the reverse direction, the address bus is unidirectional, which means the CPU address lines are outputs, and the ROM chip's address pins are inputs. So, all devices on a computer motherboard are connected to the address bus in parallel. But it's obvious that computer memory supports two types of communication. Reading and writing. How would the memory chip know which operation exactly the CPU intends to perform? For that, computers use a signaling system called the control bus. It also consists of regular wires, and its two most important lines are read and write, designated as RD and WR. Please note, both the read and write signals are active low, meaning, if the CPU intends to perform a read operation, it pulls the read line low. If it wants to write data, it pulls the write line low. These two signals are mutually exclusive, because it's not possible to read and write simultaneously. The reason why read and write and other control signals are active low is power consumption considerations. OK, so the CPU outputs the binary value of 44206 to the address bus. Now, to let the ROM chip know it intends to read the contents of this memory cell, it also activates the read line. You might wonder now, why would the ROM chip need the read signal, if read is all it can do, and the CPU cannot write anything to it? Well, thing is, the CPU has no idea what type of memory it's addressing. Actually, it doesn't care. So, every time it wants to read something, no matter if it's ROM or RAM it's reading from, it will always pull the read line low. And in fact, the ROM chip does need the read signal, because it needs to know when exactly it's supposed to send the data requested to the CPU. Looks like now we need a mechanism to transfer data. And here comes to play the data bus. Probably the most important and also complicated communication system in a computer. And it's bidirectional. In our example, the data bus carries exactly 8 bits of data. Because the size of the data bus directly affects the performance of the entire system, it is precisely this that we mean when we say, for example, that the computer is 8-bit, and the game console is 16-bit, and the version of Windows is 32 or 64-bit. In response to the CPU's request, the ROM chip puts the contents of the memory cell located at address 44206 onto the data bus. Let's say the value is 112. Naturally, the data will also be presented in binary format. 112 will look like this. While the read operation is in progress, the CPU becomes the receiving side, and its data bus lines act as inputs, and the ROM chip's data bus pins act as outputs. Our little computer here has an 8-bit data bus, which means the size of a single memory cell is 1 byte, which is exactly 8 bits. So, our CPU has read exactly 1 byte of data, and its value equals 112. Like I said before, the ROM chip contains firmware, a computer programming machine code written by a programmer. So, 112, which is again just a sample value I picked, is the command that tells the CPU to perform a certain task. These commands are also called operation codes, opcodes, or machine code instructions. So, imagine it's the instruction to write a value of 205 to the memory cell located at address 62088. Please allow me to add a ROM chip to write to to our improvised computer. It will be connected in parallel to both the address and the data bus of our system. Like I said, the address bus is unidirectional, and in theory, we can connect an infinite number of devices to it. But now we got a problem. When the CPU initiates a read or write operation, because we now got two memory chips in our system, how would they know which one the CPU is addressing? If both of them get activated simultaneously, their outputs will struggle, and we're going to have a collision on our data bus. Here, another very important mechanism in computer engineering comes into play. It's called address decoding. The term decoding here has nothing to do with ciphering or encryption. It's merely a set of logic gates that output logic zero whenever a certain pattern of ones and zeros is present on its inputs. What exactly this combination should be is determined by the circuit of the decoder itself. So, in order for the CPU to know exactly which device it's addressing, when designing a computer system, all address space is divided into ranges. Some part of it is taken by ROM, another part by RAM. Imagine a book that has several chapters. We know exactly which page each chapter starts and ends in. And it's impossible to move chapters if the book had already been printed. Same thing happens in a computer's address space. Each memory device is assigned a certain address range, which is fixed and cannot be altered. The size of the entire address space is determined by the number of address bus lines and is always tied to the CPU model. Our computer here has a CPU with 16 address lines. So, the maximum number of bytes this CPU can address is 2 to the power of 16. Which is 65,536 bytes, or 64 kilobytes. You can also come up with this number using Windows Calculator. 16 binary ones will yield a decimal value of 65,535. Because memory cell number 1, mind you, has the address 0, not 1. So, the address space of our computer starts at byte number 0 and ends at byte number 65,535. And the total number of bytes that can be addressed is 65,536. For the CPU to be able to work both with ROM and RAM, we need to wire them in such a way that they're activated whenever accessing the address range that is assigned to each of them, based on our concept. Or we can say, these two chips must be properly decoded. To keep things simple, in our little experiment, each chip will have exactly half the memory space, which is 32 kilobytes apiece. ROM will take the lower 32k and RAM the upper 32k. So, the ROM will be located in the address range from 0 to 32,767 and RAM from 32,768 to 65,535. Why exactly like that and not the other way around? ROM is usually placed at the start of the address space because that's where a typical CPU starts program execution after the reset signal arrives. When you hit reset, what you actually do is zero the program counter, PC. So, address 0 is where the very first firmware instruction must be located. All data between the CPU and memory chips will naturally be transferred in binary format. Here's what it's gonna look like. To be honest, these numbers do not really fit well with the ear and are pretty hard to perceive. So, in computers and programming, a hexadecimal numbering system is used. It differs from decimal system in that in addition to digits from 0 to 9, Latin letters from A to F are used that also act as digits. So, hexadecimal uses a total of 16 digits instead of 10. In essence, the hexadecimal system is a simplified way of representing binary numbers. It basically boils down to a simple replacement of every combination of 4 binary digits there are also 16 of them with one hexadecimal digit like this. So, 8-bit of binary data can be represented by 2 hex digits while 16-bit of binary data will take up 4 hex digits and so on. By the way, in programming, 4-bits are called a nibble, 8-bits are called a byte and 16-bits and up are called a word. Now, these values will look like this and our ROM chip will decode to addresses from 0 to 7 FFF while the RAM chip will take up address range from 8000 to FFFF. We must pronounce hex numbers by a single digit because 8000 is not eight thousand, it's a different number. Hex numbers have their own designation in programming. For example, the C language uses prefix OX while in assembly language Latin letter H H for hex, uppercase or lowercase doesn't matter is appended at the end of the number. All these designations are equivalent. OK, let us take a close look at these values and try to figure out how they differ in terms of address bus bits. Their binary representation tells us that their distinct difference is their most significant bit. Any hex number in the range above 7 FFF has the highest address line, that's A15, equal to 1. Any hex number below 8000 has address line A15 equal to 0. So, we need the ROM chip to activate when A15 is low and RAM chip to activate when A15 is high. Memory chips have a special control line for activation called CS chip select or CE chip enable which is basically the same. The CS signal is also active low. If the IC is not active its outputs will be in the so-called Z state high impedance which means that the pin is effectively disconnected. Such outputs are also called tri-state. Memory ICs also have the OE control signal which stands for output enable. Since ROM can only send data the CS and OE there have basically the same meaning. But for RAM active OE means the data is being read from the memory. So, to decode these two memory ICs all we have to do is use a simple inverter gate. The ROM's CE signal will be wired directly to the A15 address line and RAM's CE will be fed from the inverter. The read signal will be wired to the output enable pins of both chips while the write signal will go to the write enable input of the RAM chip. The write signal is not used with the ROM chip, naturally. Before us, ladies and gentlemen is the real working circuit of the simplest computer. So, how does it work? Once the CPU is reset its address pointer the program counter, PC is zeroed. So, all address lines are set to logic 0. As the CPU immediately starts reading program code from memory it sets the read line low. Because the CE line of the ROM chip is also pulled low by the A15 address line the ROM IC activates and puts up the contents of the requested memory cell address 0 on the database. Although RAM is wired to all buses in parallel it does not interfere because it's not active. Its CS input is fed logic high from the inverter and its data lines are in the Z state effectively disconnected. Now, imagine the CPU reads the opcode that instructs it to write byte AA170 decimal to address B000 45056 decimal. The CPU sets its address bus to this value in binary format. Then, it puts the integer number AA which is 10101010 binary on the database. The AA and 55 bytes alternating zeros and ones is the value often used in programming for memory testing. So, we got the binary representation of AA integer on our database. What happens next? Is the CPU pulls the write line low and the RAM chip mind you the A15 is high and CS is low which means it's active performs the write operation storing value AA in a memory cell whose address is B000. Now, this data is stored and whenever the processor needs it it can read it. To do this it has to set the address bus to B000 and pull the read signal low. The chip enable line of the RAM chip will also be pulled low by the inverter and it will place the contents of the memory cell B000 on the database and the CPU will read it switching its data lines to input mode. OK, so we have created a contiguous address space of 64 kilobytes covered by two memory chips. The CPU has no idea about this structure it simply accesses a cell by address and receives data and each of the memory ICs responds to the CPU based on which range the address requested belongs to. In real computers decoding is of course much more complex. The decoder can use several address lines and other signals to obtain a narrower address range. Using this mechanism several memory and input-output devices can be decoded. In any case it's up to the developer to decide which address range each memory chip must be decoded. And when firmware is written the programmer naturally must be aware which devices decode to which address range. For example every personal computer has this thing called display memory area also known as video RAM or VRAM. It's basically your regular random access memory however writing data to it changes the contents of the computer screen. Typically VRAM memory cells are located according to their position on the screen that is from left to right and from top to bottom. The lower address is the upper left corner the higher address is the lower right corner although there may be exceptions. Now we have studied a very important mechanism that explains the interaction of the central processor and memory devices. With this knowledge it's easy to understand the principles of operation of any computer. But it seems our virtual PC is missing something. It does not in any way interact with the user. All real computers in addition to memory have input-output ports. This is where you plug in your keyboard mouse or gamepad. To work with ports the CPU also uses read and write operations but they are decoded into a separate address space and accessed with separate machine language instructions. The address bus used however is the same so to separate ports from memory devices there exist additional signals on the control bus called input-output request IOREC and memory request MEMREC. Traditionally their active level is also low. So for the CPU to be able to talk to memory correctly we must also decode the memory request signal. Here's what the schematic will look like then. Now both memory chips can get a logic low on their chip enable inputs only on condition the memory request line is also low. So what are we going to do with our little computer now? Say we want to impersonate Arduino and flash an LED. Let us add a simple 1-bit output port to our system. We will use a D-type flip-flop to implement it. The data input will be wired directly to the data bus while the clock input needs to be properly decoded. Let our port use the address FF. This number corresponds to 8 ones in binary. Like I said CPU uses the same address bus to decode ports so we will need an AND gate with 8 inputs to track this combination on the address bus. Our port will be write-only so we also need to decode the CPU's write line. The device must react only to port output instructions and ignore memory write instructions so we also need to decode the input output request signal. If we don't the CPU won't know how to differentiate between memory cell FF and port number FF and when it performs a write operation both will be affected. OK. Let us analyze the circuit step by step. Say the CPU wants to turn on the LED so it executes a machine code instruction that writes value 1 to port FF. As we have wired the flip-flop D input to the D0 line the state of the LED will correspond to the least significant bit LSB of the databyte. So the CPU sets the address lines from A0 to A7 to 8 ones that's value FF and puts up logic 1 on D0 line. Then it pulls the write and input output request lines low. At this very moment the flip-flop will be clocked at the C input and data will be copied into the register. The LED will illuminate. To turn the LED off the CPU must perform exactly the same action except the value written to the flip-flop port must be 0. This principle of parallel connection and individual addressing of peripheral devices with the help of decoding has been used in computer engineering for decades. And that's exactly how ISA and PCI buses in personal computers work. All slots in such systems are connected in parallel and decoding happens on the expansion cords inserted. If you've ever used the ISA Sound Blaster you remember you had to set up its address and interrupt line. What you were actually doing is setting up its decoder chip. So, any expansion card can be inserted into any slot and will work the same way. However, starting with a PCI Express bus manufacturers have abandoned this principle. And today each motherboard slot has independent lines for communication with every individual expansion board install. And that would be it for today. I hope you enjoyed this video and learned something new. If you did, make sure to give it a thumbs up and hit the subscribe button if you haven't already. And please don't hesitate to share it on social media. This was Ramatino. Take care, see you soon.