How do Transistors Build into a CPU? 🖥️🤔 How do Transistors Work? 🖥️🤔

Inside your computer are dozens of microchips with tens of billions of transistors. You may know that these transistors are the cornerstone of all technology, are manufactured in multi-billion dollar factories, and are only a few nanometers in size. But what you may not know is that this network of billions of transistors is actually organized a lot like Lego bricks connected together in order to build a Lego set such as this 7,541 piece Millennium Falcon. In this video, we'll explore how the transistors inside your computer are like Lego bricks, what transistors actually look like, how they perform basic logic, and finally, how 26 billion transistors are organized into the different sections of the CPU. So, let's dive right in. This video is sponsored by Brilliant.org. Let's begin with exploring Lego bricks and transistors. In this analogy, we'll equate one transistor to a single stud on a Lego brick. On their own, neither one does much at all. However, when a few transistors are connected together, they form a standard cell, which is the fundamental building block of every CPU and GPU. Similarly, multiple studs form a Lego piece, which is the building block for all Lego creations. For example, two transistors connected together form an inverter standard cell, four transistors connected together form a NAND gate, and six transistors form an OR gate. There are many other standard cells built by connecting transistors together, and similarly, there are a wide range of Lego pieces with varying numbers of studs and shapes. But before we explore some of the more complicated standard cells, we first need to understand how one of the simplest standard cells works. Let's examine the inverter, which is analogous to a 1x2 Lego brick. Its function is simply to take an input of a 1 and output a 0, or vice versa. This inverter has a logic symbol like this, and the standard cells look like this. Essentially, standard cells like this inverter are the real world physical structure of a logic gate, and it's what you would see if you could open up and zoom into a nanoscopic view of the processor in your smartphone. So let's see how it works. At the bottom of the standard cell are two transistors built on top of a silicon base. We'll focus on one of these transistors, which has been simplified a little bit for the sake of this explanation. Inside this transistor are a few key parts, the gate, the channel, and the dielectric, which is a barrier that separates the two and prevents electricity from passing through. Additionally, on either side of the channel and above the gate are metal contacts connected to vertical vias that are used to input and output electricity to the corresponding parts. So how does this transistor work? Well, when one volt is applied, or input, to the gate, electricity is able to flow through the channel, essentially connecting one side of the channel to the other side. However, when zero volts is applied to the gate, electricity cannot flow through, resulting in electrically separating or isolating the two sides of the channel. A quick analogy is to think of the channel and gate as a water faucet and handle. When the handle is turned on, water can flow, and when the handle is turned off, the water is stopped. The name of this transistor is an n-type FinFET due to its fin-like shape. Here's the symbol for a simple n-type transistor. And again, when one volt is applied to the gate, electricity can flow through the channel. Let's bring in a second transistor over here, which is the same FinFET shape, but functions a little differently and is called a p-type transistor. Specifically, it's designed to operate in the exact opposite fashion where, when one volt is applied to the gate, electricity cannot flow through the channel, and when zero volts is applied to the gate, electricity can flow through. Using our water faucet analogy from before, this transistor is like a faulty water faucet where, when the handle is down, the water is on, and in order to turn the water off, you have to actively lift the handle. This is the symbol for the p-type transistor, and the circle on the gate indicates the inverted functionality. Now that we have two transistors, one n-type and the other p-type, let's connect the gate between the two of them and merge the input gate contacts together into a single contact. As a result, a single input voltage on the gate, which can be either one volt or zero volts, travels to the shared gate and controls both of the transistors. Because the n-type and p-type transistors are opposite of each other, when zero volts is applied to the gate, the p-type will allow electricity to flow through the channel and is considered on, and the n-type will be off. And then, when one volt is applied to the gate, the n-type and p-type FinFETs flip to on and off, and the n-type allows electricity to flow through while the p-type doesn't. The next step is to bring in the power and ground rails above the transistors. The power rail is at one volt, and the ground rail at zero volts, and they always stay at one and zero volts. Next, we add some wires to the design, and to do that we use the contact points and build vertical vias that connect both sides of the transistor along with the power rails to a layer of wires called local interconnects. The power rails, vias, and interconnects are simply wires made from conductive metals such as copper, tungsten, or aluminum, and just carry electricity around in intricate paths of wires. Let's add a label for the input, which is the electrical wire that connects to the shared gate, and a label for the output over here, which connects to the local interconnect wire attached to a side of each of the two transistors. Now that we have a complete standard cell, what happens when one volt is applied to the input? Well, one volt travels down to the shared gate that controls both of the transistors, and as a result, the n-type transistor turns on and the p-type transistor turns off. With the n-type transistor on, electricity can flow through its channel, which results in zero volts from the ground rail traveling through the local interconnects, down a vertical via, through the channel of the n-type FinFET, then back up a vertical via on the other side, across a separate section of local interconnects, and finally to the output. Thus, the input of one volt results in an output of zero volts. At the same time, because the same one volt input controls the p-type transistor, which is off, no electricity flows through it, and this section of wire is isolated. So then, what happens when zero volts is applied to the input? Well, the opposite happens. The p-type transistor turns on, and the one volt rail is connected through the local interconnect wires and vias, through the p-type's channel, back up a vertical via, and to the output, thus turning a zero into a one. At the same time, the n-type transistor is off, and this section of wire is isolated. One thing to note is that while these wires may look like they're floating three-dimensional structures, all the empty spaces are in fact filled with insulating material called dielectric. This may have been a rather long explanation, but truly understanding the basic function of the inverter standard cell is critical to understanding the more complicated ones, such as this NAND gate, this AND gate, or this exclusive OR gate, which we'll discuss in a little bit. Let's now take a second and discuss some of the details that might be taught in an electrical engineering course. Here's the symbol for an inverter and its logic table, and again, an input of a one outputs a zero and vice versa. Next, here's the schematic where you can see the one volt power rail above and the zero volt ground rail below, and here are the two simplified transistors with the bottom one n-type and the top one a p-type. The input to the gates is connected together. However, we typically break them apart and label them with the same input name. Next, the output is positioned in the middle of the two transistors. As a result, when one volt is applied to input A, the output is connected to the ground rail, and when zero is input, the output is connected to the power rail. Now that we've thoroughly explored this inverter, let's dive into some of the more complicated standard cells, such as these NAND and NOR gates with four transistors, the AND and OR gates with six transistors, and the exclusive OR and exclusive NOR gates with ten transistors inside of it. First, however, let's continue discussing how standard cells are like Lego bricks. As mentioned earlier, there's a wide range of standard cells built by connecting together different numbers of transistors using a local interconnects, and similarly, there's a wide range of Lego pieces built by connecting different numbers of studs in varying configurations. So, to continue our analogy, if a Lego stud is an individual transistor and Lego bricks and pieces are standard cells, then the equivalent to a Lego set is a macro cell. For example, here are 350 Lego pieces used to build a Starfighter Lego set, and likewise, here are approximately 160 standard cells connected to form a macro cell that can add two numbers together. In order to connect each of the 160 standard cells together, a higher layer of vertical vias and wires, called Metal-1 or M-1, is used. When we zoom in, we can find the individual standard cells all fitting between multiple rows of the 1 volt power and 0 volt ground rails. As you may have figured out already, this circuit uses binary 1s and 0s, and the input numbers that are added together are sent to this macro cell using 1 volt or 0 volt on these two sets of 32 wires, and then the binary output is carried along these 33 wires over here. Let's continue this analogy further. Just like there are thousands of different Lego sets, there is a wide range of different macro cells, some having thousands upon thousands of standard cells inside of them. For example, a more complicated function is multiplication, which takes in two numbers, multiplies them together, and then outputs the result. However, to perform multiplication, we need a much larger macro cell, such as this one, which is built from 6100 standard cells. The complexity of the 32-bit multiplication macro cell is similar to the complexity of this Millennium Falcon Lego set, built from around 7500 Lego pieces. One note is that macro cells are also called modules, functional blocks, functional units, or just blocks or units. So now that we've seen a couple of macro cells, what's the next step up? Well, multiple macro cells are combined into an IP core, and then multiple IP cores are combined into a core, or hardware accelerator, and these elements are then combined into a complete chip, such as this processor, which can be found inside the CPU package mounted onto a motherboard. Processors are incredibly complicated, with tens of billions of transistors inside of them. So here's a little bit of insight into how they work, again using Lego. Lego pieces are pretty simple objects. For example, this pile of Lego bricks may hurt when you step on it, but overall it isn't that interesting or impressive. However, when you meticulously assemble thousands of Lego pieces together, you can build an impressive Lego creation. Likewise, an individual transistor might seem pretty mundane, and a standard cell or a basic logic gate that can only flip a 1 to 0 isn't all that useful on its own. However, the key is that when you have tens of thousands of scientists and engineers assembling billions of standard cells and logic gates together in what can be thought of as a multi-billion piece Lego set, well then, we get an integrated circuit capable of browsing the internet, playing YouTube videos, or running video games with incredible graphics. By the way, thus far we showed you the local interconnect layer for the standard cells and one metal layer called M1, which is used to build small macrocells. In fact, CPUs use around 17 metal layers of wires connected together to form the macrocells, IP cores, cores, and other sections of the CPU. CPUs are incredibly powerful devices, but when you boil them down, it's just a bunch of transistors and logic gates connected together using kilometers of wires. Throughout this video, we've assumed that you have a basic understanding of logic gates, but if you want to learn more about how logic works, we recommend you check out Brilliant.org, the sponsor of this video. Brilliant is an educational platform with thousands of interactive lessons in math, science, programming, data analysis, along with two courses on logic. Brilliant's mission is to create a world of better problem solvers, and every one of their courses is crafted with a hands-on problem-solving approach that helps build understanding from the ground up. We love to use Brilliant because each of their lessons is only 10 minutes long, and their entire catalog can be accessed using the Brilliant app on your phone. Learning a little every day is one of the most important things you can do, both for your career and for your mental health. Consider this. If you were to use the Brilliant app instead of mindlessly scrolling, in a couple of weeks you could build an in-depth understanding of how AI and large language models work. And then after that, you could, for example, learn how to program in Python, or see how quantum computers work. With each lesson only 10 minutes long, it's a no-brainer that you should delete addictive and time-wasting apps and learn something new using the Brilliant app on your phone. You can sign up for free using the link brilliant.org slash brancheducation, and for a whole month you'll have full access to their entire catalog of courses. If you like their content and decide to stick around, the link will also save you 20% off an annual subscription. You can also find this link in the description below. So let's get back to exploring some of the more complicated standard cells. Specifically, we'll start with this NAND gate, then the AND gate, and then discuss the other types of logic gates. This NAND gate performs the logic of AND followed by a NOT. Using the LEGO analogy, the NAND gate would be equivalent to a 2x2 LEGO brick. We'll move a little bit faster than our explanation of the inverter and start with the logic symbol, truth table, and schematic. To build a NAND gate, we use two p-type transistors in parallel above, and two n-type in series below. The two inputs for the NAND gate are connected to one of each of the transistor's gates, and the output is in the middle of the channels. In order for the output to be a zero, both of the inputs need to be ones, thus turning both n-types on and creating a path from the ground rail to the output. For the output to be a one, we need either or both of the p-type transistors to be on, thus creating a path from the one-volt power rail to the output. Let's see how we turn this logic into a physical standard cell. Here are the two p-type transistors above, and the two n-types below, as well as the power and ground rails. To control these transistors, the two inputs, labeled input A and input B, are connected to the center of each of the gates, which span across one set of n-type and p-type transistors. In order to build the p-type transistors in parallel, we connect the power rail to one side of each of the transistors, and the output is connected in the middle. You can see that when either or both of these p-type transistors is on, which happens when a zero is applied to either of the inputs, then the one-volt rail is connected through that p-type transistor to the output. As a result, an input of 00, 01, or 10 yields an output of a one. And again, these transistors are in parallel because either or both need to be on for one volt to travel to the output. Next, let's look at the n-type transistors, which are placed in series with one another. To build this, the ground rail is connected to one side of both of the transistors, and the output is connected to the opposite side. Therefore, for zero volts from the ground rail to travel through these transistors, both n-types need to be on, which happens when both n-types are connected to one volt. Thus, an input of 11 yields an output of a zero. Again, these transistors are in series because both need to be turned on to allow electricity to flow through. One note is that thus far we've been showing the power rail above and the ground rail below. However, in the addition macrocell we showed earlier, the power and ground rails are alternated, and therefore half of the standard cells have the power rail below and the ground above. To accommodate this, the standard cell is flipped around with the p-type transistors on the bottom and the n-type on top. But it still works the same way, and if we rotate the camera, well, it looks the same as before. We're going to get to the other logic gates in a second, but first we want to say that this video script was actually one of the hardest to write. In the first 28 drafts of the script, we were trying to explain how standard cells work and how logic gates are used to multiply two numbers. However, we decided to move the lesson on how logic gates perform math into an entirely separate video and focus this video on the design of standard cells. As a result, this video has taken close to 54 script revisions, and six times I just threw out large sections and restructured the whole script. So we have one ask from you, the viewer. If you've enjoyed watching this video and learned something new, could you take just a few seconds to write a quick comment below, subscribe to the channel, like the video, and most importantly, share it with a friend, family member, or colleague. We would greatly appreciate it. Thank you. Let's next take a look at this AND gate. Here's the schematic, along with the logic table. Essentially, an AND gate is a combination of a NAND gate with an inverter tacked on. Let's take a look at the standard cell. Here you can see the NAND gate with two inputs, and the output of the NAND gate being carried to the input of the inverter with the overall output right here. As a result, when we input two 1s, the output is also a 1. However, if either or both inputs are 0s, then the output is a 0. The NOR and OR logic gates use very similar setups to the NAND and AND cells. A NOR gate is simply a NAND gate, but with two p-types connected in series, and the n-types in parallel. And then an OR gate is a NOR gate with an inverter tacked on. Pause the video to work out the logic. Exclusive OR and exclusive NOR gates are a little more complicated and require a total of 10 transistors each, because the logic needs to account for only one of the inputs being on. Here's the standard cell for an exclusive OR gate. We'll spend a few seconds flying around it and showing the different layers, so see if you can draw a schematic and work out how it works. Next, here's the corresponding schematic. And then here's what it looks like with an input of 1 and 0. And then here it is with an input of 0 and 0, and then an input of 1 and 1. When we look at an exclusive NOR gate, we see that it's rather similar, just with the series and parallel n-type and p-type transistors flipped around. So one question is, how do we make an AND gate with three inputs? What about an exclusive OR gate with four inputs? Let's end this lesson by discussing a few important technical details and notes. The first is that this circuit is called a complementary metal oxide semiconductor, or CMOS circuit. This is due to the two types of transistors, n-type and p-type, functioning opposite each other. These circuits have a high noise tolerance and low power consumption because one of the pairs of transistors is always off. And, if designed correctly, there is never a path between the 1-volt rail and the ground rail. The second note is that although the explanation for how an inverter works took around 10 minutes, in actuality it physically takes just a few picoseconds, or 10 to the negative 12 seconds, between the input changing from zero to one volt to the gates, and then for the transistors to change their states, and then for zero volts from the ground rail to travel to the output. With each standard cell taking a few picoseconds to complete its logic, the multiplication macro cell with over 6,000 standard cells takes around 150 to 200 picoseconds between the inputs coming in and all the standard cells completing their logic and changing their states to yield the correct value on the output wires. The third note is that transistors are incredibly complicated. For example, most FinFETs are built from multiple fins in order to improve electrical characteristics. If you're wondering how transistors are made, or how they work, well, we're planning multiple videos that will explore transistor manufacturing, transistor physics, why CMOS circuits use p-type transistors above and n-types below, and the evolution and future of transistor design. Subscribe so you don't miss it. The final note is that we'd like to give a shout out to Matt Venn, who is vital in helping us get these accurate standard cell layouts. He runs the Zero the ASIC course YouTube channel, and we recommend you check it out if you want to learn more about integrated circuit design. Additionally, he runs a service called Tiny Tapeout, which allows you to manufacture your own integrated circuit. We're thankful to all our Patreon and YouTube membership sponsors for supporting our videos. If you want to financially support our work, you can find the links in the description below. This is Branch Education, and we create 3D animations that dive deeply into the technology that drives our modern world. Watch another Branch video by clicking one of these cards, or click here to subscribe. Thanks for watching to the end.